Perpustakaan Digital ITB

For realizing Ge CMOS devices with a smallequivalent oxide thickness (EOT) and a low density of fastinterface states (Dit), understanding of slow traps in Ge gatestacks and reduction of its density are one of the most crucialissues. For this purpose, we examine slow trap density andlocations of Al2O3/GeOx/Ge MOS gate stacks, which arefabricated by plasma oxidation in this work. In Al2O3/GeOx/Ge MOS interfaces formed by preplasma oxidation (pre-PO)and postplasma oxidation (post-PO), slow trap density hasbeen compared. Also, the slow trap density on the thicknessdependence of GeOxand Al2O3is systematically evaluated forthe Al2O3/GeOx/Ge MOS gate stacks formed by pre-PO. It isfound that near the conduction band edge of Ge, additional electron slow traps will be generated by using the post-PO process.Above all, in the Al2O3/GeOx/Ge MOS interfaces with pre-PO. The main slow traps can be located near the GeOx/Geinterfaces for the electrons and the Al2O3/GeOxinterfaces for the holes, respectively.