2018 ERJNL PP C.-H. Wong 1.pdf?
Terbatas Irwan Sofiyan
» ITB
Terbatas Irwan Sofiyan
» ITB
A compact low-supply-voltage yet low-noise digital bang–bang PLL
(DBBPLL) is proposed. The bang–bang phase detector is based on a
dynamic double-tail latch which enables high time-to-voltage gain
and low input-referred noise under tight power-supply headroom.
The ring-based digitally controlled oscillator (DCO) is made of multiple
gm-controlled delay units and a constant-gm-biased current
DAC. By combining these two blocks, the DCO can now better tolerate
supply noise and process variations. A prototype DBBPLL has been
implemented in a mainstream 28 nm CMOS process with a compact
die area of 0.014 mm2. When operating at 2.6 GHz, it consumes
2.9 mW with 0.75 V supply and achieves low in-band phase noise of
?105 dBc/Hz.